RISC Pipeline
In a 5-stage RISC pipeline (IF, ID, EX, MEM, WB), what type of hazard occurs when an instruction needs the result of a preceding instruction that has not yet completed the Write-Back stage, and data forwarding is not implemented?
In a 5-stage RISC pipeline (IF, ID, EX, MEM, WB), what type of hazard occurs when an instruction needs the result of a preceding instruction that has not yet completed the Write-Back stage, and data forwarding is not implemented?