Metastability Window

A 1 GHz signal is being sampled by a 500 MHz clock. The flip-flop used has a setup time T_s = 50ps, hold time T_h = 30ps, and a resolution time constant au = 25ps. The "failure window" T_w is defined as the region around the clock edge where a transition causes metastability. If T_w = T_s + T_h, what is the probability that a random input transition will trigger a metastable state in a single clock cycle?